Literature Survey : Carvalho and Pedro, "Large and Small-signal IMD Behavior of Power Amplifiers"

In this article, Carvalho and Pedro examine the "so-called large signal IMD sweet spots," that arise in amplifiers that exhibit gain expansion in large signal operation.


From "IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 47, NO. 12, DECEMBER 1999," page 2364

By combining the Volterra series small-signal model of the FET amplifer with a "two sinusoidal input describing function," based on that proposed by Gelb (1968), a model was developed that accurately predicts the nonlinear behavior of the FET amplifer for a wide dynamic range of input signals.

IMD sweets spots are shown to be due to phase cancellation of IMD components arising from the small-signal part of the LS model by those generated by the nonlinear describing function.

At the heart of the analysis is that the small signal and large signal nonlinearities are fundamentally different mechanisms. Therefore, they presented a model whereby the small-signal term becomes negligible as the amplitude of the input increases and the large-signal describing term dominates.

Proposal

Honors Thesis Proposal

by Victor Piper

Submitted in partial fulfillment of the requirements of the Honors Program of

The University of Massachusetts Lowell

Introduction

The microwave and millimeter wave market is seeing increasing demand for transmitters that are at the same time highly linear and power-efficient. Unfortunately, these demands are difficult for designers to satisfy simultaneously. Power efficiency in amplifiers means that a minimum of DC power is consumed. Linear amplification, however, requires that the transistor be biased to allow maximum current swing. Under such conditions up to half of the total current will be consumed by the DC bias, limiting the maximum efficiency to 50%.
A variety of advanced circuit design techniques have been developed to reduce the effects of nonlinear amplification. These techniques would allow the amplifier designer to decrease DC power consumption by biasing the transistors in a less linear regime and then to compensate for the nonlinear effects.
Before beginning an expensive iterative design process to develop a manufacturable linearized amplifier, it will be prudent to identify the primary mechanism of nonlinear effects in a particular device. Once this mechanism has been isolated, work can begin in selecting a technique to reduce its effects.

Project Description

In this thesis, 0.15 um gate length InGaAs/GaAs E/D pHEMT devices, manufactured on Raytheon RF Component's (RRFC) P64 process, will be investigated. A literature survey will be conducted to inform the development of a test plan. The goal of the test plan will be to reveal the degree to which the most well known mechanisms of nonlinearity are impacting the performance of the pHEMT device. The test plan will be executed and the results presented.

Methods

The survey will include current literature from peer-reviewed technical publications: IEEE Electron Devices Transactions and Letters, IEEE Microwave Theory and Techniques, Journal of Applied Physics, Solid-State Communications, Solid-State Electronics Journal, and Microelectronics Journal.
The survey will be completed in two phases. In the first part, the primary contributors to transistor amplifier nonlinearity will be documented. Next, it will be determined how to conduct a comprehensive, but economical, battery of DC and RF tests for the purpose of characterizing those nonlinearities.

Informed by the outcome of the literature survey, a test plan will be developed and
implemented. DC and RF testing will be completed in the Microwave Test Lab at RRFC. The Microwave Test Lab is equipped with the hardware necessary to make on-wafer measurements of S-Parameters, Single-Tone Loadpull up to 50 GHz, Two-Tone Loadpull at 10 GHz, as well as Pulsed and Static I-V curves.
Through methods of graphical and tabular analysis, the test data obtained from the pHEMT device will be compared against theoretically calculated values, historical data on similar devices, and results published in the technical literature. This analysis will reveal the magnitude of the impact of nonlinear effects upon the performance of the pHEMT device.

Deliverables

The process of research, test plan development, device characterization, and data analysis will be recorded, compiled, and presented in a thesis paper deliverable before the conclusion of the Spring semester, 2007.

Schedule Begin End

First Advisory Meeting 11/22/06 12/01/06

Literature Review 01/29/07 03/03/07

Short Paper- Nonlinearities 02/16/07 02/17/07

Draft Test Plan 02/23/07 02/24/07

Final Test Plan 03/02/07 03/03/07

Device Fabrication 1 01/19/07 02/10/07

Preliminary DC Testing 02/12/07 02/17/07

Device Fabrication 2 02/19/07 03/03/07 *Contingent upon good DC test results

Device Testing 03/05/07 03/31/07

Data Summary 1 03/09/07 03/10/07

Data Summary 2 03/16/07 03/17/07

Data Summary 3 03/23/07 03/24/07

Data Summary 4 03/30/07 03/31/07

Data Analysis 04/02/07 04/13/07

Final Data Summary 04/13/07 04/14/07

Thesis Write-Up 04/16/07 04/21/07

Draft Submission 04/23/07 04/24/07

Thesis Revision 04/27/07 05/04/07

Draft Submission 05/04/07 05/05/07

Final Submission 05/11/07 05/12/07